Description
You will be working at Synopsys, a leading provider of electronic design automation (EDA) software and services. As a Staff Engineer in the R&D Engineering team, you will be responsible for driving RTL-to-GDSII implementation for complex digital IP, ensuring signoff timing and PV closure. You will lead backend flow development, including PnR, STA, DRC, LVS, and EMIR analysis. You will collaborate with design, CAD, and cross-functional teams to optimize backend methodologies and resolve technical issues. You will also support project execution by troubleshooting timing, congestion, and physical verification challenges.
Key responsibilities include:
- Driving RTL-to-GDSII implementation for complex digital IP, ensuring signoff timing and PV closure.
- Leading backend flow development, including PnR, STA, DRC, LVS, and EMIR analysis.
- Collaborating with design, CAD, and cross-functional teams to optimize backend methodologies and resolve technical issues.
- Supporting project execution by troubleshooting timing, congestion, and physical verification challenges.
You will be part of the dynamic Design Support Group (DSG) at Synopsys, a passionate collective of engineers dedicated to delivering world-class backend solutions. Our team thrives on innovation, collaboration, and a shared commitment to technical excellence. We work closely with customers and internal teams, supporting them through every stage of their design journey and continually pushing the boundaries of what's possible in digital backend technology.
As a Staff Engineer, you will have the opportunity to work on cutting-edge projects, develop your technical skills, and contribute to the growth and success of the company. You will be part of a dynamic and supportive team that values innovation, collaboration, and technical excellence.