ASIC Digital Design Engineer, Staff

We are seeking a highly experienced engineering professional to join our team as an ASIC Digital Design Engineer, Staff. The successful candidate will be responsible for designing and developing cutting-edge semiconductor solutions.

What you'll do

• Implementing reference and unified verification flows for Synopsys digital IP products using leading EDA tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
• Building robust, scalable verification infrastructures from the ground up to support diverse and complex IP and SoC projects.

What you need

• Minimum 5 to 10 years of hands-on experience in IP/SoC verification, with a proven track record of technical leadership.
• Strong expertise in using Synopsys verification tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.