ASIC Physical Design, Principal Engineer

We are seeking a highly motivated individual with a passion for physical design and implementation of complex Mixed Signal IPs and test chips. As an ASIC Physical Design, Principal Engineer, you will lead the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off.

What you'll do

• Leading the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off.
• Collaborating with cross-functional teams to integrate and verify IP designs to achieve project goals.
• Providing technical guidance and mentorship.
• Continuously improving design methodologies and processes to enhance efficiency and quality.

What you need

• BE or MSEE with 10+ years of direct physical design experience.
• Proficiency in full design cycle from RTL to GDSII, with a focus on Physical Design.
• Solid engineering understanding of IC design, implementation flows, and methodologies for deep submicron design.