Description
We are looking for a Senior Staff Package Design Engineer to join our team. Ensuring Synopsys IP test chip packages meets performance requirements and helps customers explore their package solution space options with Synopsys IPs. Candidate with extensive package design and model extraction experience. Can-do attitude, quick learning, and solid electronic skills are assets. You will be working with a global, highly skilled and very supportive team.
What you'll do
- Early design stage collaboration to optimize and define requirements for SI&PI performance (e.g., bump maps)
- Support 5~7 PHY Test Chip Package designs per year
- Help customers explore their package solution space options with Synopsys IPs
- Model extract and analyze package substrate designs
- Coordination of package design phases and flow
- Resolves a wide range of issues in creative way
- Provides regular updates to manager on project status
- Represents the organization on business unit projects
What you need
- Minimum of 10+ years of relevant experience
- Good verbal and written English communication skills required
- Advanced circuit and transmission line theory knowledge required
- 3D Electromagnetic modeling experience (e.g. HFSS, or similar tool)
- Familiarity with both Windows and Linux operating systems
- Bachelor’s degree in electrical, electronic engineering or equivalent
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://careers.synopsys.com/job/nepean/senior-staff-package-design-engineer/44408/91133362016