ASIC Digital, Verification Engineer - Senior Staff

We are seeking a highly skilled and driven ASIC Digital Verification Engineer with a passion for advancing technology and solving complex problems. The successful candidate will be responsible for developing and executing comprehensive verification plans for complex ASIC designs, focusing on next-generation HBM (High Bandwidth Memory) products.

What you'll do

• Developing and executing comprehensive verification plans for complex ASIC designs, focusing on next-generation HBM (High Bandwidth Memory) products.
• Writing and maintaining advanced testcases using SystemVerilog and UVM methodologies to ensure thorough coverage and robust verification.
• Debugging and analyzing complex testbench and design-related issues, collaborating closely with design and mixed-signal engineering teams.

What you need

• Bachelor’s or Master’s degree in Electrical Engineering (BSEE or MSEE) with a minimum of 10 years of digital design/verification experience.
• Proven experience in writing and maintaining testcases using SystemVerilog/UVM.
• Strong debugging skills for complex testbench and design-related issues.
• Solid understanding of digital circuit design concepts and principles.
• Proficiency with scripting languages such as Python or Perl for automation and workflow enhancement.