Description
You will join Synopsys, the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. With years of experience in SoC design or verification, you understand RTL and SystemVerilog, and you're able to debug complex issues and provide hands-on technical support.
What You'll Be Doing
- Engage directly with customers in Shanghai and across the region to understand their SoC design and verification challenges and translate those into technical solutions using Synopsys tools
- Provide hands-on technical support and guidance across front-end and mid-end workflows including CDC/RDC, low-power design with UPF, gate-level simulation, VIP integration, and formal verification
- Debug complex customer issues involving RTL, SystemVerilog testbenches, and tool flows, working through root cause analysis and delivering actionable resolutions
- Develop and deliver technical demonstrations, training sessions, and best-practice recommendations tailored to customer design environments and project goals
- Collaborate with product engineering, R&D, and sales teams to communicate customer feedback, reproduce issues, and influence product roadmap based on real-world use cases
- Build and maintain deep technical relationships with customer engineering teams, becoming a trusted advisor on methodology and tooling decisions
- Create technical content including application notes, reference flows, and example designs that help customers adopt and optimize Synopsys solutions
The Impact You Will Have
- Customers will adopt Synopsys tools faster and with fewer roadblocks because you help them navigate the hardest parts of their design and verification flows
- Design teams will close timing, power, and verification goals more reliably because you identified the methodology gaps and tooling configurations that were holding them back
- Product teams at Synopsys will build better tools because you surface the real-world friction points that only come from direct customer engagement
- Customer engineering teams will level up their technical capabilities through the training, guidance, and examples you provide
- Synopsys will win and expand business in the region because customers trust you to deliver solutions that actually work in their environment
- Complex technical escalations will resolve faster because you can reproduce, diagnose, and explain issues in terms both customers and internal teams understand
- The broader applications engineering team will benefit from the flows, scripts, and technical collateral you develop and share
What You'll Need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Microelectronics, or a related technical field
- 5+ years of hands-on experience in chip design, SoC development, or verification engineering
- Strong working knowledge of RTL design and SystemVerilog, you should be comfortable reading, writing, and debugging both
- Solid understanding of SoC design fundamentals including clocking, reset, power domains, and design-for-test concepts
- Experience with one or more of the following is a strong plus: CDC/RDC analysis, low-power design and UPF, gate-level simulation, VIP or protocol verification, formal verification, or lint and design rule checking
- Prior experience in a customer-facing technical role such as applications engineering, field engineering, or technical consulting is a plus
- Fluency in Mandarin and professional working proficiency in English for customer communication and internal collaboration