Signal and Power Integrity Technical Lead

The Cisco Network Hardware Engineering (NHE) SI team is seeking a Signal and Power Integrity Technical Lead for design and analysis of high-speed interconnects and power distribution networks.

As a member of the SI team, you will help develop the next generations of Cisco Switch and Router and AI/ML products, participate in the definition and design of current and next-generation ASICs, packages, printed circuit boards (PCBs), and system interconnects.

Your Impact

• Model and simulate High-speed links, including high-speed I/O, IC package, and system interconnections.
• Model and analyze power delivery networks.
• Perform electromagnetic modeling of complex 3D structures.
• Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs.
• Write signal integrity design guidelines, test plans, and test reports.
• Decide on appropriate PCB material, stack-up, and work with vendors to address any DFM (Design for Manufacturability) issues.
• Support prototype function bring-up, validation, and troubleshooting.
• Work closely with other hardware function teams, including HW design, eCAD, Mechanical, Power, EMC, and Diagnostics to deliver first-class products.
• Provide technical leadership and mentorship to junior SI/PI engineers, foster skill development and best practices within the team.
• Drive definition, implementation, and continuous improvement of advanced SI/PI methodologies, simulation flows, and design processes.
• Contribute to the overall SI/PI technology roadmap, evaluate new tools, techniques, and design approaches to maintain a competitive edge.
• Lead the investigation and resolution of highly complex, system-level signal and power integrity challenges that span multiple domains (ASIC, package, PCB, system).
• Lead comprehensive SI/PI design reviews, providing expert guidance and ensuring adherence to stringent performance and reliability targets.

Minimum Qualifications

• 10+ years of related experience with a Bachelor’s Degree in BSEE, or 8+ years of experience with a Master’s Degree.
• Experience applying EE fundamentals, EM theory, and coupling mechanisms in circuit or system design, analysis, or troubleshooting.
• Hands-on experience with simulation or analysis of transmission lines, channel modeling, and signal/power integrity.
• Practical experience configuring and interpreting measurements from VNA, TDR, and oscilloscopes.

Preferred Qualifications

• Strong tools knowledge with tools such as HFSS, ADS, MATLAB, Cadence PowerSI/DC, Allegro, Simbeor, and HSpice.
• Proficiency with 3-D field solvers and PI (Power Integrity) simulation tools such as PowerSI/DC.
• Self-motivation, collaboration, strong communication, and a desire to innovate.
• Working experience with high-speed NRZ and PAM4 SerDes, as well as high-speed PCB/package development and PI analysis.