Description
Our internship programs offer real-world projects, hands-on experience, and opportunities to collaborate with teams globally.
As a Digital Design Engineer Apprentice at Synopsys, you will assist in developing and maintaining UVM-based testbenches for functional verification of digital blocks of Serdes PHYs.
Responsibilities:
- Create and execute test cases, sequences, checkers, and assertions to verify RTL functionality and ensure protocol compliance in Serial Links.
- Analyze simulation results, debug test failures, and work closely with design engineers to identify and resolve functional issues.
- Contribute to coverage-driven verification by developing functional coverage models and tracking verification metrics to improve design quality.
Requirements:
- Completed Bachelor's degree in Electronics and Communication Engineering, Electrical or a related field.
- Fresh graduates from the class of 2026 or 2025.
- Strong digital electronics fundamentals.
- Proficiency in Verilog and SystemVerilog.
- Exposure to functional verification methodologies like UVM, OVM, or VMM is a plus.
- Theoretical knowledge of protocols such as PCIe is a plus.
Program Details:
- 12 months Apprenticeship Program
- Location: Noida, India
- Working Model: In office
- Full-Time/Part-Time: Full-time
- Start Date: November/December 2026