Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
You are an experienced and passionate Analog Methodology Engineer with a deep understanding of mixed-signal circuit design principles and emerging AI/ML technologies. You thrive in a collaborative environment and work well with a cross-functional team of experts. Your hands-on experience with transistor-level simulation, reliability analysis, and static timing analysis (STA) sets you apart. You are proficient in scripting and automation, and you use those skills to streamline design processes and mentor other engineers.
The Analog Integration Team (AIT) exists to coordinate and accelerate methodology adoption across analog and adjacent engineering domains, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration, and other mixed-signal cross-domain workflows. In this role, you will:
- Provide clear ownership for analog and adjacent-domain methodology areas.
- Act as the focal point for customer-driven methodology requirements and integration challenges.
- Be accountable for prioritization, adoption, stakeholder engagement, and execution.
- Improve coordination across product teams and adjacent engineering organizations, including engagement with customers and foundries.
- Support methodology for application-optimized IP and the special-purpose silicon customers are building for specific workloads and system architectures.
You have a Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field; MSEE or PhD preferred.
- You have 25-30 years of experience in IC design with a BSEE degree, or 22-25 years with an MSEE or PhD.
- You have expert knowledge of analog and adjacent-domain methodology, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration, and other mixed-signal cross-domain workflows.
- You have a deep understanding of transistor-level circuit design, CMOS fundamentals, and physical IP, including reliability effects such as electromigration, IR drop, and aging.
- You have experience defining methodology for advanced nodes with circuit enablement teams and foundries.
- You have experience collaborating across a broad mixed-signal IP portfolio and aligning methodology requirements among multiple engineering organizations.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.