Description
Cisco's Client Optics Group (COG) designs and delivers high-speed optical transceivers and platforms that power Cisco's core data center networking solutions. We're seeking an experienced ASIC Link Modeling Engineer to join our team and collaborate on silicon photonics systems for next-generation products.
Your Impact:
- Develop system-level behavioral models and comprehensive link simulations for Cisco's silicon photonics systems.
- Lead link budget analysis, channel modeling, and statistical simulations to evaluate jitter, noise, crosstalk, and bit error rate (BER) across transmit and receive paths.
- Define and optimize transceiver architectures including TX/RX equalization, clock and data recovery behavior, and DSP algorithms through behavioral modeling and simulation.
- Debug complex link simulations, identify architectural bottlenecks, and correlate pre-silicon models with post-silicon lab measurements to validate design performance.
- Collaborate across cross-functional teams to develop IBIS-AMI models, create modeling documentation, and support product release from concept through production.
Minimum Qualifications:
- Bachelors + 12 years of related experience, or Masters + 8 years of related experience, or PhD + 5 years of ASIC link modeling experience.
- Proficiency in Python, C/C++, and MATLAB for behavioral model development and automated analysis.
- Proven understanding of high-speed communication theory, transmission line theory, SerDes, Ethernet, D2D PHY protocols, and DSP fundamentals.
- Demonstrated experience with EDA and SI simulation tools (e.g., Keysight ADS, Synopsys HSPICE, Cadence) and link modeling methodologies.
- Analytical, problem-solving, and debugging skills with excellent communication and teamwork abilities.
Preferred Qualifications:
- Experience with optical DSP (ODSP), integrated transceiver features, and PAM4 modulation techniques.
- Familiarity with IBIS-AMI model development to support customer & system-level signal integrity simulations.
- Experience with Linux-based development environments and scripting automation (Perl, TCL).
- Knowledge of ASIC/SoC design flow, understanding of multi-functional impacts on link performance (packaging, PCB, optics).
- Post-silicon validation experience and correlation of lab measurements with pre-silicon models.
The starting salary range for this position is $192,400.00 to $275,800.00, reflecting the projected salary range for new hires in this position in U.S. and/or Canada locations.