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From the employer's careers site First seen 1 Nov 2026

ASIC Engineering Technical Leader (RTL Design/SOC | 8- 14 Years)

Cisco Bangalore, India Hybrid senior full-time

The employer hasn't listed a salary.

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Description

Join the Cisco SiliconOne team as an ASIC Engineering Technical Leader, focusing on RTL design and SoC development. You'll work on crafting Enterprise and Service Provider solutions, gaining exposure to various aspects of systems and applications, including Silicon, Hardware, Software, telemetry, and security.

Key Responsibilities:

  • Lead architectural work, identifying problems and solutions
  • Manage all aspects of implementation, including specification, design, timing analysis, power optimisation, and flow automation
  • Document and improve standard methodologies for product success

Requirements:

  • BS/MS with 11+/9+ years of hands-on experience in large-scale, high-performance ASIC RTL development
  • Experience with Verilog, SystemVerilog, VCS, Spyglass, CDC, and formal verification
  • Strong understanding of gate-level RTL and synthesis
  • Programming skills in Python, C, C++, and Perl
  • Excellent written and verbal communication skills, with leadership abilities

Preferred Qualifications:

  • Experience in architecture and definition of high-scale, high-performance ASICs
  • Validation experience in implementation, flow automation, and team leadership

Benefits:

  • Opportunity to work with a top-tier networking company
  • Rare combination of startup culture and benefits of a large company
  • Global network of experts and opportunities for growth

Skills

Required

Nice to have

Ready to apply?

You apply with the employer directly. Their original posting is here: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Bangalore-India/ASIC-Engineering-Technical-Leader_2008269

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