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Synopsys

ASIC Design Verification Engineer, Staff - Principal

Synopsys
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staff employee Hsinchu, Taiwan

First indexed 16 Oct 2026

Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As an ASIC Design Verification Engineer, Staff - Principal, you will develop verification strategies and plans for ASIC/SoC projects. You will define and implement testbench architecture and methodologies, build testbench infrastructure and verification components, create verification item lists, coverage models, and checkers. Additionally, you will provide clear, metric-driven reports on verification progress, break down tasks, develop schedules, and manage deliverables. You will also lead and coordinate design review meetings and serve as a technical expert and mentor within the team.

Key qualifications include:

  • Bachelor’s or Master’s degree in Electrical Engineering (BSEE/MSEE) with 15+ years of relevant experience
  • Extensive hands-on experience creating test environments from functional specifications using UVM/VMM/OVM
  • Proven expertise in constraint random verification, coverage closure, and failure analysis
  • Proficiency in SystemVerilog, UVM, and object-oriented verification methodologies
  • Experience with Verilog/SystemVerilog coding and simulation tools
  • Solid understanding of SoC/ASIC design flows and backend processes
  • Knowledge of one or more interface protocols: DDR, PCIe, AMBA (AMBA2, AXI, CHI), SD, eMMC, Ethernet, USB, MIPI
  • Experience working in Unix environments
  • Strong English communication skills, both written and verbal
  • Ability to work independently, drive innovation, and solve complex problems
  • Strong team player with excellent interpersonal skills

Preferred qualifications include experience with formal verification techniques, knowledge of C/C++, Perl, Python, and TCL scripting, understanding of firmware or embedded software development, and experience with functional safety standards (ISO26262, FMEDA).

We offer comprehensive benefits, including health and wellness plans, time away programs, family support, ESPP, retirement plans, and competitive salaries.

This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/hsinchu/asic-design-verification-engineer-staff-principal/44408/100703928160