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From the employer's careers site First seen 31 Oct 2026 · Still live on 4 Nov 2026

Hardware Design Technical Lead

Cisco San Jose, California senior full-time

Salary

$171,600 - $245,000 per year

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Description

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally.

As a Hardware Design Technical Lead, you will be a key member of the Cisco Purpose Built Switch hardware team. You will define and design the next generation Hyperscaler Switch hardware based on Silicon One and/or merchant ASIC. Your responsibilities will include system and board level specification, schematic capture, FPGA design, ASIC/System level bring up and troubleshooting. You will work closely with multiple groups, including ASIC, DFT, Signal Integrity, software, Diagnostics, and Manufacturing teams to resolve any design issues.

Your day-to-day tasks will involve debugging and troubleshooting in labs using scopes and analyzers, and acting as a technical liaison with major component suppliers for the product.

Minimum Qualifications:

  • Bachelor's degree in Electrical Engineering or Computer Engineering or Telecommunications and 8+ years of experience, or Master’s degree in Electrical Engineering or Computer Engineering or Telecommunications and 6+ years of experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in system level development.
  • Prior experience with common HW technology, including power, clock, memory, CPU, and variety of system interfaces.
  • Previous experience with complex high-speed board design and board bring-up.
  • Prior experience with schematics/layout, Hardware bring-up, trouble-shooting, system level testing.
  • Experience with working with Software team on system bring-up and porting, devices configuration (registers level).

Preferred Qualifications:

  • Experience with schematics, PCB and Verilog HDL/VHDL design.
  • Experience on scripts (Python, Tcl, etc.).
  • Experience with lab bring up and design validation of products.
  • Knowledge of the Ethernet protocol.
  • Experience with access switch Ethernet interfaces: gigabit, multi gigabit, 10 gigabit.
  • Experience with high speed Ethernet interfaces: 25G, 100G, 400G, 800G.
  • Experience with DRAM, CPU subcomplex and control interfaces such as PCIe, I2C, SPI, MDC/MDIO.
  • Self-motivation, teamwork, and strong communication skills.

Benefits:

  • Medical, dental, and vision insurance.
  • 401(k) plan with a Cisco matching contribution.
  • Paid parental leave.
  • Short and long-term disability coverage.
  • Basic life insurance.
  • Paid time away (vacation, holidays, sick time).
  • Optional 10 paid days per full calendar year to volunteer.

Salary Range: $171,600.00 - $245,000.00

Skills

Required

Nice to have

  • Verilog HDL/VHDL design
  • Python
  • Tcl
  • Ethernet protocol
  • gigabit
  • multi gigabit
  • 10 gigabit
  • 25G
  • 100G
  • 400G
  • 800G
  • PCIe
  • I2C
  • SPI
  • MDC/MDIO

Ready to apply?

You apply with the employer directly. Their original posting is here: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/Hardware-Engineering-Technical-Leader_2014526-1

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