Description
The Networking Hardware Engineering (NHE) group at Cisco creates innovative hardware platforms central to the AI era. As a Signal Integrity Engineer in the signal integrity team under NHE, you will contribute to PCB board design, simulation, and validation of high-speed Serdes, DDR/LPDDR, and power delivery network. You will collaborate with experienced engineers and multi-functional teams.
Your responsibilities include:
- Assisting in the design and analysis of high-speed digital and analog systems from concept through to production
- Performing signal integrity simulations using industry-standard tools
- Modelling and analysing power delivery networks to ensure signal integrity and system reliability in next-generation hardware
- Optimising pre- and post-route signal integrity analysis of PCBs
- Supporting prototype function bring-up, and system-level validation and troubleshooting
- Collaborating with hardware, layout, and validation teams to resolve technical issues
- Contributing to documentation, data analysis, and correlation of simulation and lab measurements
The minimum qualifications for this role are:
- Bachelor's degree in electrical engineering or computer engineering/science or related degree with 5+ years of relevant experience, or master's degree in electrical engineering or computer engineering/science or related field with 3+ years of relevant experience
- Experience with high-speed SerDes technologies such as PAM4 or NRZ, including some combination of simulation, bring-up, debugging, measurements, or optimisation
- Experience with electromagnetic or signal integrity simulation tools, including 2D/3D field solvers on comparable platforms such as Ansys HFSS, Cadence Clarity, Sigrity, Siemens Hyperlynx
Preferred qualifications include:
- Experience with IBIS, HSPICE, ADS, MATLAB, Cadence PowerSI AC/DC, Allegro
- Familiarity with different I/O standards for clock signals (e.g., LVDS, LVPECL, HCSL)
- Working experience with DDR5/LPDDR5, NRZ and PAM4 SerDes, as well as high-speed PCB/package development and PI analysis
- Thorough knowledge of PCB stack-up design - standard processes, performance vis-à-vis PCB materials, surface finishes, vendor capabilities, and manufacturing trade-offs
- Hands-on exposure to lab measurements including real-time scope, sampling scope, Spectrum analyzer, VNA & TDR
- Good understanding of EM and transmission line concepts, timing, jitter, crosstalk, noise, channel modeling, channel equalization techniques, power delivery & decoupling
The starting salary range for this position is $115,800.00 to $163,200.00, reflecting the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation, equity, or benefits.