Signal Integrity Engineer III

As a Signal Integrity Engineer III, you will contribute to signal and power integrity solutions within a networking platform design team, supporting high-performance LAN products from analysis through validation.

You will:

• Support the design and validation of signal and power integrity solutions for system-level high-speed interfaces, power distribution networks (PDN), high-precision timing, and general-purpose I/O.
• Develop robust, cost-effective SI/PI solutions through analysis, simulation, design-of-experiments, and lab correlation using modern tools and methodologies.
• Perform interconnect and PDN modelling, SI/PI simulations, and analysis to help ensure designs meet performance, reliability, and industry specifications.
• Contribute to PCB stack-ups, design rules, and constraints, and participate in design reviews to ensure compliance with SI/PI best practices and standards.
• Conduct lab measurements and correlate results with simulations using advanced lab instrumentation.
• Identify, communicate, and help resolve SI/PI risks to support high-quality, on-schedule product delivery.
• Evaluate and contribute to innovative solutions for cutting-edge designs and next-generation technologies.
• Collaborate with hardware, layout, system, and validation engineers, sharing technical knowledge and strengthening SI capability across teams.
• Plan and manage assigned work with guidance as needed, taking ownership of analysis, documentation, and verification through completion.

Basic Qualifications:

• Bachelor’s or Master’s degree in Electrical or Electronics Engineering.
• 3+ years of hands-on experience in product-level package or board design, SI analysis or methodology development, and lab correlation of simulation results.
• Good understanding of electromagnetics and signal integrity fundamentals, including transmission line effects, reflections, crosstalk, insertion/return loss, ground bounce, termination techniques, I/O buffer modelling, and high-speed differential signaling.
• Working knowledge of digital and analog circuit design, including frequency-domain analysis, jitter sources, and jitter reduction techniques.
• Experience with high-speed interfaces such as Ethernet SerDes, PCIe, USB, or other SerDes-based systems.
• Experience with SI/PI simulation tools such as Synopsys HSPICE, Keysight ADS, or Ansys HFSS. Exposure to 2-D/3-D field solvers, statistical or BER analysis, and Cadence CAD tools is advantageous.
• Hands-on experience with relevant lab equipment such as VNAs, TDRs, real-time oscilloscopes, or spectrum analyzers.
• Analytical problem solver who can work from observed symptoms toward root cause and resolution with support from senior engineers when needed.

Preferred Qualifications:

• Strong interpersonal skills, with the ability to work effectively in teams while also managing assigned tasks independently.
• Ability to build productive working relationships across hardware, layout, system, and validation teams; self-motivated, curious, and receptive to coaching and feedback.
• Good written and verbal communication skills, with the ability to read and interpret engineering drawings and technical documents, document findings, and explain SI trade-offs clearly.
• Willingness to take ownership of diverse technical challenges, learn continuously, and contribute beyond immediate responsibilities.