Description
Synopsys is seeking a Sr. Staff Applications Engineer to join their Signoff Static Timing Analysis (STA) team in Bengaluru, India. As a technical expert in timing signoff, you will collaborate with semiconductor companies to support Synopsys' industry-leading PrimeTime signoff solutions for advanced node designs.
Responsibilities:
- Work directly with leading semiconductor companies to resolve complex timing closure and signoff challenges on advanced node designs
- Debug critical timing issues using PrimeTime
- Guide customers through MMMC analysis, OCV/AOCV/POCV methodologies, and SI-aware timing flows
- Collaborate with R&D and product engineering teams to reproduce customer issues and drive tool enhancements
- Develop reference flows, automation scripts, and best practice documentation
- Deliver technical training sessions, workshops, and live demos to customer design teams
The Impact You Will Have:
- Enable successful tapeouts for cutting-edge semiconductor designs
- Improve customer productivity and signoff quality
- Influence PrimeTime product direction
- Build long-term technical partnerships with key accounts
- Accelerate adoption of advanced PrimeTime features
- Reduce customer support escalations
Requirements:
- Bachelor's degree in Electronics and Communication Engineering, plus Master's degree in VLSI, Embedded Systems, or Communication Systems
- Strong hands-on experience with Synopsys PrimeTime
- Deep understanding of timing constraints, MMMC analysis frameworks, and variation-aware methodologies
- Proven ability to debug complex timing issues
- Proficiency in Tcl scripting, Python or Perl scripting experience is a strong plus
- Experience with advanced node designs at 5nm and below
- Excellent communication skills
Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
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