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From the employer's careers site First seen 26 Oct 2026 · Still live on 31 Oct 2026

ASIC Design Verification Engineer

Cisco San Jose, California senior full-time

Salary

$167,700 to $245,200 per year

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Description

The Common Hardware Group (CHG) at Cisco is looking for an ASIC Design Verification Engineer to join their team. The successful candidate will participate in the ASIC design verification for Cisco high-end switching products.

Responsibilities:

  • Participate in the ASIC design verification for Cisco high-end switching products
  • Perform end-to-end verification of design blocks and top-level
  • Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis
  • Construct testbenches components like scoreboard, agents, sequencers, and monitors
  • Collaborate with the hardware, software designers, and vendors

Minimum Qualifications:

  • Bachelor's degree in electrical/computer science/computer engineering/related degree and 7+ years of related experience
  • or Master's in electrical/computer science/computer engineering/related degree and 4+ years of related experience
  • or PhD in electrical/computer science/computer engineering/related degree + 1 year of related experience
  • Experience in System Verilog/UVM
  • Experience with ASIC design and verification processes, debugging, methodology, and tools
  • Experience in verifying blocks/clusters/full chip level for ASIC

Preferred Qualifications:

  • Post-silicon lab bring-up experience
  • Experience with Linux, C/C++, and/or Python/Perl
  • Experience in Networking
  • Experience with Formal verification

Benefits:

  • Medical, dental and vision insurance
  • 401(k) plan with a Cisco matching contribution
  • Paid parental leave
  • Short and long-term disability coverage
  • Basic life insurance
  • 10 paid holidays per full calendar year
  • 1 paid day off for employee's birthday
  • Paid year-end holiday shutdown
  • 4 paid days off for personal wellness
  • Non-exempt employees receive 16 days of paid vacation time per full calendar year
  • Exempt employees participate in Cisco's flexible vacation time off program
  • 80 hours of sick time off provided on hire date and each January 1st thereafter
  • Optional 10 paid days per full calendar year to volunteer

Skills

Required

  • System Verilog
  • UVM
  • ASIC design
  • verification

Nice to have

Ready to apply?

You apply with the employer directly. Their original posting is here: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/ASIC-Design-Verification-Engineer_2010971-1

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