Description
NVIDIA is seeking RTL Design Engineers for its High Speed IO IP's deployed in Automotive chips.
As a designer, you will be responsible for implementing USB, UFS, Ethernet or PCIE IP's for next-generation Automotive chips. You will make architectural trade-offs based on feature/performance/power requirements, analyze system implications, come up with the micro-architecture, implement RTL, drive verification, close timing, and support silicon validation.
Responsibilities:
- Own micro-architecture and RTL development of design modules
- Micro-architect features to meet performance, power and area requirements
- Work with HW architects to define critical features
- Work with verification teams to verify the correctness of implemented features
- Partner with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
Requirements:
- BTech/MTech with 2+ years of experience in crafting complex Units and CPU/micro-controller based Sub-systems
- Knowledge of security standards, protocols and system security architectures of modern SOC's would be a significant plus
- Excellent influencing skills resulting in collaboration with cross-cultural, multi-geography and matrixed teams
- Good debugging, analytical and problem-solving skills
- Great interpersonal skills and ability to work as an excellent teammate
NVIDIA offers highly competitive salaries and a comprehensive benefits package.