Description
We are seeking a Sr. ASIC Design Engineer to join our team at Hewlett Packard Enterprise.
As part of our fast-paced silicon group, you will become an expert in building high-speed ASICs, from specifications to final netlist.
Responsibilities:
- You will start with a functional specification of a module and produce a detailed micro-architecture specification that meets the power/area requirements.
- You will implement the design using Verilog or System Verilog.
- Write functional coverage/SVA to help verification catch corner case bugs.
- You will work with the Physical Design team for optimal floorplan and timing closure.
- You will identify and fix timing in RTL to meet the frequency target.
- Work with the Verification team to make sure your block is fully validated.
- You will have opportunities to improve leadership skills by providing mentoring/guidance to new college-grad engineers and interns.
Recommended skills:
- Bachelor’s degree in Electrical Engineering required (Master’s strongly desired) with 5+ years of relevant experience.
- Strong analytical/problem-solving skills.
- Knowledge of Computer Architecture/networking protocols through graduate-level courses or prior work is a plus.
- Strong coding skills in Verilog/System Verilog through courses/projects and previous work experience is desired.
- Knowledge of synthesis/lint and other state-of-the-art EDA tools is desired.
- Excellent written and verbal communication skills are good to have.
- Knowledge of Perl/Python is a plus.
- Experience with AI agent tools is a plus.