Design Verification Intern

NVIDIA's Tegra is a complex SoC powering autonomous driving platforms, requiring safety, reliability, and thermal robustness. We are seeking a Design Verification Intern to verify the NVTHERM IP at the SoC level within Tegra.

Job Overview As a Design Verification Intern, you will take ownership of NVTHERM IP verification at the SoC level within Tegra. You will ensure correct thermal sensing, thermal response, and protection behavior in the context of the full Tegra SoC.

Responsibilities

• Verify the NVTHERM IP at the SoC level, ensuring correct thermal sensing, thermal response, and protection behavior.
• Ramp up on the SoC verification environment, understanding the testbench, existing legacy test cases, and simulation flow.
• Learn the coverage flow used for signoff, including how functional and code coverage are collected and reviewed.
• Analyze current coverage against the legacy case suite, identify coverage holes, and update or add test cases to close them.
• Work closely with your mentor and the SoCV team to understand verification priorities and signoff requirements.

Requirements

• Currently pursuing a degree in Electrical Engineering, Computer Engineering, or a related field.
• Basic understanding of digital design and verification concepts (RTL, testbenches, simulation).
• Familiarity with Verilog/SystemVerilog is a plus.
• Strong analytical skills and attention to detail, comfortable digging into coverage reports and test results to find gaps.
• Good communication skills and eagerness to learn in a fast-paced, complex SoC environment.