Description
As the manager of the Circuit Co-Design function at NVIDIA, you will lead a team of senior engineers across silicon bring-up, post-silicon validation, and circuit co-design for NVIDIA's safety, reliability, and performance enhancement features.
Your responsibilities will include:
- Leading a team of senior engineers across silicon bring-up, post-silicon validation, and circuit co-design
- Setting technical direction and defining the methodology for characterizing circuits, closing simulation-to-silicon gaps, and quantifying noise and dI/dt margins
- Making key technical decisions and providing guidance to the team
- Hiring and developing outstanding engineers
- Driving cross-functional alignment across circuit design, architecture, VLSI, PDN, reliability engineering, firmware, and product
To be successful in this role, you will need:
- A BS or MS in Electrical Engineering, Computer Engineering, or equivalent
- 10+ overall years in silicon validation, circuit co-design, or post-silicon characterization, with at least 3 years leading technical teams
- Deep circuit fundamentals, including analog, digital, and mixed-signal
- Genuine expertise in power integrity, noise analysis, dI/dt characterization, and reliability and aging mechanisms
- Hands-on background with substrate and supply noise analysis, PDN design and mitigation, and silicon reliability mechanisms
- A track record of hiring strong engineers, developing them into recognized experts, and retaining them
- The ability to hold technical depth and organizational breadth simultaneously