Description
You will be part of the Silicon One development organization as an ASIC Technical Lead- MBIST engineer. As a member of this team, you will be involved in crafting cutting-edge next-generation networking chips.
Your Impact
- You will lead the MBIST methodology in Silicon One chips.
- Design and implement robust and reusable MBIST architecture.
- Specify comprehensive MBIST architecture and implementation agnostic to technology and tools.
- Define MBIST requirements for advanced technology nodes and advanced tech packages.
Minimum Qualifications
- Bachelor's in Electrical engineering with at least 12+ years (or Master's with 10+ years) of experience in ASIC DFT.
- Prior experience with memory architectures (SRAM, DRAM, etc.) and failure modes.
- Prior experience with industry-standard DFT tools (e.g., Synopsys DesignWare, SMS, TestMax, Mentor Graphics Tessent).
- Scripting skills (Python, TCL, Perl) for automation of test generation and analysis.
- Strategic Skills: Ability to plan and execute complex test strategies, excellent communication skills for cross-team collaboration, and a focus on silicon quality and yield improvement.
Preferred Qualifications
- Experience in Verilog/System Verilog.
- Experience addressing Memory failure correlation in production.
The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally.