Description
You will work as a Staff Applications Engineer, Yield & Diagnosis at Synopsys, driving customer engagements on scan diagnosis, chain diagnosis, and Memory BIST failure analysis using Synopsys Yield Explorer and related diagnosis workflows.
You have spent years deep in the trenches of silicon debug, where a single scan chain failure can cost millions and a good diagnosis report can save a product launch. You know that yield is not an abstract metric, it is the difference between a chip that ships and one that does not, and you have learned to read failure patterns the way others read code.
Your responsibilities will include:
- Driving customer engagements on scan diagnosis, chain diagnosis, and Memory BIST failure analysis
- Supporting post-silicon debug activities for high-volume manufacturing customers
- Interpreting diagnosis reports, building defect pareto analysis, and delivering actionable recommendations
- Managing technical escalations from customer DFT, product engineering, and yield teams
- Collaborating cross-functionally with internal DFT architects, ATPG developers, and product engineering teams
- Building and delivering volume diagnosis workflows that scale across wafer-level test data
- Presenting technical findings and yield improvement strategies to customer stakeholders
The impact you will have includes:
- Directly determining whether a customer's chip moves from debug to production
- Enabling systematic defect reduction across high-volume manufacturing lines
- Helping customers make better decisions about design-for-test architecture, process changes, and test coverage
- Strengthening customer trust in Synopsys tooling
- Shaping the next generation of diagnosis capabilities in Yield Explorer and related Synopsys DFT products
Requirements include:
- Bachelor's or Master's degree in Electrical Engineering, Electronics, VLSI, or related field
- 6+ years of hands-on experience in semiconductor diagnosis, DFT, yield engineering, product engineering, or silicon validation
- Deep expertise in scan diagnosis, chain diagnosis, and failure localization methodologies
- Strong working knowledge of volume diagnosis for scan and Memory BIST
- Hands-on experience with Synopsys Yield Explorer and diagnosis tool workflows
- Solid understanding of DFT fundamentals including ATPG, scan compression, scan architecture, and Memory BIST
Rewards and benefits include a comprehensive range of health, wellness, and financial benefits.