Description
You will support customers deploying HAPS and ProtoCompiler on real SoC designs as a Staff Applications Engineer, HAV Solutions at Synopsys.
The base salary range for this position is $112,000-$168,000.
You have spent years working with FPGAs and ASIC designs, and you know that getting a prototype to boot is rarely about the tool, it is about understanding what the design is actually doing.
Your responsibilities will include:
- Supporting customer deployments of HAPS and ProtoCompiler, working through the ASIC-to-FPGA flow including partitioning, synthesis, place-and-route, timing closure, and hardware bring-up
- Debugging customer designs involving interface IP such as DDR4/DDR5, LPDDR, PCIe, Ethernet, USB, AXI, and other standard protocols
- Reproducing and analyzing technical issues reported by customers, working with R&D to identify root causes and deliver solutions or workarounds
- Developing and documenting methodologies for partitioning strategies, clock architecture, debug instrumentation, and bring-up procedures
- Collaborating with Sales and Customer Success teams to support technical evaluations, proof-of-concept engagements, and deployment planning
- Using Verdi, ProtoCompiler runtime debug tools, and protocol analyzers to troubleshoot RTL, netlist, timing, and hardware issues
The impact you will have includes:
- Helping customers get their prototypes running so they can start software development and system validation weeks or months earlier
- Solving technical problems that unblock critical customer milestones and keep their chip schedules on track
- Providing feedback to R&D that improves ProtoCompiler features, usability, and robustness based on real customer use cases
- Building reusable methodologies and documentation that help other applications engineers and customers deploy faster
- Supporting competitive evaluations where your technical depth and problem-solving ability directly influence customer decisions
- Contributing to the success of SoC programs across AI, automotive, networking, and mobile markets by enabling faster hardware availability
To qualify, you will need:
- A Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
- 5-8 years in FPGA implementation, ASIC design, ASIC verification, FPGA prototyping, or applications engineering
- Solid experience with FPGA synthesis, place-and-route, and timing closure using Xilinx Vivado, Intel Quartus, or similar tools
- Working knowledge of SystemVerilog, RTL design, and verification concepts
- Hands-on experience with at least one interface IP family such as PCIe, DDR, Ethernet, USB, or AXI
- Scripting ability in Tcl, Python, or shell for automation and flow customization
- Experience with Synopsys HAPS, ProtoCompiler, or other FPGA-based prototyping platforms is a strong plus
You will join the Hardware-Assisted Verification (HAV) Applications Engineering team, working with customers deploying HAPS and ProtoCompiler for FPGA-based prototyping.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.