Description
NVIDIA is seeking an ASIC Flow and Integration Engineer to drive design methodology, automation, and integration for its High Speed IO team.
As a primary methodology engineer, you will work across all NVIDIA-delivered projects, owning the integration process and collaborating with global teams to define and implement best-in-class methodologies.
Responsibilities:
- Own the full-chip and block-level integration process across multiple NVIDIA SoC and GPU projects.
- Stitch together RTL units and ensure seamless connectivity and hierarchy management.
- Define and evolve internal design methodologies to improve scalability, quality, and turnaround time.
- Build automation pipelines using Python/Perl to streamline integration, debug, and delivery.
- Develop modular and reusable systems that can be easily delivered and adapted across different SoC and GPU architectures.
- Collaborate extensively with RTL, verification, physical design, and architecture teams to ensure flow compatibility and design readiness.
- Drive full-chip debug efforts, connectivity, and functional issues across multiple hierarchies and technology nodes.
- Contribute to continuous improvement of internal standards and mentor engineers on flow usage and integration practices.
Requirements:
- BS or B.Tech or MS or M.Tech in EE, ECE, CS, or equivalent degree with 1+ year or more experience in design integration and methodologies for ASIC design.
- Comprehensive understanding of IP development flows and build flows.
- Excellent influencing skills resulting in collaboration with cross-cultural, multi-geography and matrixed teams.
- Good debugging, analytical, and problem-solving skills.
- Great interpersonal skills and ability to work as an excellent teammate.
- Working exposure with AI tools like Claude and Cursor would be a plus.
NVIDIA offers highly competitive salaries and a comprehensive benefits package.