Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
You are a passionate and technically adept engineer who thrives in a fast-paced, collaborative environment. With a strong background in digital design and verification, you possess an in-depth understanding of RTL-based IP core development, particularly for high-speed memory interfaces such as HBM. You are driven by curiosity and innovation, eager to tackle complex challenges in the semiconductor industry.
Responsibilities:
- Designing and implementing RTL-based HBM controller IP cores for cutting-edge SoC applications.
- Interpreting and translating standard and product functional specifications into detailed micro-architectures.
- Making architectural and methodological judgments for both design and verification activities.
- Developing comprehensive verification strategies, including testbench architectures using SystemVerilog and UVM.
- Creating and maintaining verification plans, item lists, coverage metrics, and checker definitions to ensure thorough validation.
- Coordinating and leading design review meetings to ensure alignment and technical excellence across global teams.
- Providing technical leadership and mentoring to junior engineers, setting quality standards and driving innovation.
- Documenting progress, generating reports with “visible” verification metrics, and ensuring project milestones are met.
The Impact You Will Have:
- Delivering high-quality, robust HBM controller IP that accelerates time-to-market for Synopsys customers.
- Enabling key innovations for AI, automotive, server, and data center applications through advanced memory interface solutions.
- Reducing integration risk and enhancing system performance for a broad portfolio of end-customer products.
- Driving technical excellence and best practices across global, cross-functional engineering teams.
- Supporting Synopsys’ reputation as a leader in silicon IP by ensuring products meet and exceed industry standards.
- Contributing to continuous improvement by identifying and implementing process, methodology, and tool enhancements.
- Mentoring and developing the next generation of engineering talent within Synopsys.
Requirements:
- Extensive hands-on experience with RTL design and micro-architecture development from functional specifications.
- Proficiency in verification methodologies (UVM/VMM/OVM), SystemVerilog, and object-oriented verification techniques.
- Deep understanding of SoC/ASIC design flows, verification planning, and coverage-driven verification.
- Experience with simulation tools, Unix operating environments, and scripting languages (Perl, Python, TCL).
- Solid knowledge of protocols such as DDR, PCIE, AMBA (AXI/CHI), SD/eMMC, Ethernet, USB, and MIPI.
- Strong English communication skills and the ability to document and present technical concepts effectively.
- BSEE with 9~10+ years or MSEE with 7~12+ years of relevant experience.
Benefits:
- Comprehensive medical and healthcare plans that work for you and your family.
- In addition to company holidays, we have ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
- Save for your future with our retirement plans that vary by region and country.
- Competitive salaries.