Description
You will engineer the future with Synopsys, a leader in silicon to systems solutions that enables rapid innovation of AI-powered products.
As an Applications Engineering, Staff Engineer - DFT, you will own full customer DFT engagements from project kickoff through tape-out and first-silicon bring-up, covering scan compression, ATPG, XLBIST, OCC, IEEE 1687/1149, and hierarchical test flows.
You will deliver hands-on technical training, workshops, and best-practice enablement sessions to customer DFT engineering teams across China.
Your responsibilities will also include:
- Reproducing complex customer issues in-house, creating minimal test cases, and partnering with R&D to resolve product gaps, enhance features, and improve quality of results
- Supporting pre-sales technical evaluations and benchmarks, translating customer requirements into proof-of-concept flows using TestMAX, DFTMAX, and TetraMAX
- Writing and maintaining reusable enablement collateral including flow documentation, known issue summaries, and workaround guides for both internal teams and customers
- Debugging DFT and ATPG issues using simulation, waveform analysis, and DRC/log file forensics to isolate root cause under tight schedule pressure
- Working across time zones with global R&D, sales, and customer teams, and traveling to customer sites in China as needed for critical engagements
The impact you will have includes:
- Enabling customers to tape out complex SoCs with robust, manufacturable test coverage, directly affecting yield and time-to-market for high-volume production chips
- Reducing customer debug cycles by catching DFT setup issues early and providing clear, actionable guidance that prevents downstream silicon failures
- Shaping the product roadmap by translating field requirements and customer pain points into prioritized R&D feature requests and quality improvements
- Building customer confidence in Synopsys DFT solutions through hands-on enablement, responsive support, and deep technical credibility that drives tool adoption and renewals
To qualify, you will need:
- A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field
- 1+ years of hands-on DFT experience covering implementation, ATPG, or silicon test in a design or validation role
- Working knowledge of scan insertion, compression architectures, ATPG, OCC, IJTAG/IEEE 1687, and hierarchical DFT methodologies
- Proficiency with Verilog or SystemVerilog for reading RTL and netlists, and strong Unix/Linux command-line skills
- Scripting ability in Tcl, Python, or Perl to automate flows, parse logs, and build test environments
- Experience debugging DFT and ATPG issues using simulation tools, waveform viewers, and DRC/log file analysis to isolate root cause
- Strong written and verbal English communication skills, comfortable leading customer calls and writing clear technical summaries and reports
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.