Standard Cell Library Engineering Internship

Our internship programs offer real-world projects, hands-on experience, and opportunities to collaborate with passionate teams globally.

You will join the Standard Cell Logic Libraries Build, Validation & Release team, which develops, validates, and delivers high-quality standard cell libraries used in semiconductor design flows.

Responsibilities

• Support standard cell library build and integration flows.
• Integrate library views and deliverables across different process corners and configurations.
• Assist with maintaining and improving build scripts and automation infrastructure.
• Support library configuration management and release preparation.
• Perform functional, structural, and consistency checks on library deliverables.
• Execute validation flows to ensure library quality and compliance with internal requirements.
• Analyze validation failures, investigate root causes, and support issue resolution.
• Help ensure consistency across different library views, formats, and release configurations.

Requirements

• Currently pursuing a degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
• Basic understanding of CMOS technology and standard cell libraries.
• Familiarity with EDA views and formats such as Liberty, LEF, GDSII, Verilog, and CDL/SPICE.
• Basic knowledge of physical verification concepts, including DRC, LVS, ERC, and EM.
• Familiarity with EDA tools for library development or physical verification.
• Scripting skills in Python, Shell/Bash, or Tcl.
• Familiarity with Linux/Unix environments.
• Strong analytical, debugging, and problem-solving skills.
• Good written and verbal English communication skills.
• Familiarity with AI tools and their application in engineering or automation is a plus.

Benefits No specific benefits mentioned.