Description
The Silicon One team at Cisco creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally.
As a Senior Signal Integrity Engineer, you will play a key role in ensuring the performance and reliability of high-speed SerDes IP, covering silicon, package, and board-level analysis.
Responsibilities:
- Provide implementation guidelines and feedback to silicon, package, board, and system design teams.
- Design and simulate high-speed SerDes signals and perform co-simulation of package and PCB in HFSS.
- Conduct feasibility studies, design verification, and sign-off processes, including lab correlation.
- Work closely with backend, package, and board design teams for bump-out and ball-out optimization.
- Drive chip-package-PCB co-design of SerDes at 112Gbps and beyond, ensuring signal integrity best practices.
Minimum Qualifications:
- M.Sc. or Ph.D. in Electrical Engineering, Electromagnetics, Physics, or a relevant related field.
- 5+ years of relevant industry experience.
- Experience in SI methodology development and full-system signal integrity analysis from die to package to PCB.
Preferred Qualifications:
- Experience with tools such as HFSS, MATLAB, Python, ADS, and HSpice.
- Familiarity with networking technologies and high-speed connectivity solutions.
- Strong analytical and problem-solving skills with a hands-on approach to debugging and validation.
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