Description
Job Description
You will be leading the Central Interoperability team at Synopsys, building it from scratch. Your focus will be on defining its technical strategy, organizational structure, verification methodology, execution model, and success metrics across high-speed interface IPs.
Key Responsibilities:
- Develop and execute the technical strategy for the Central Interoperability team.
- Lead end-to-end Controller-PHY interoperability qualification.
- Establish an automated Interop Factory for seamless integration and qualification of new releases.
- Drive interoperability verification into protocol compliance, stress scenarios, and implementation readiness.
- Apply AI-driven approaches to verification work.
- Create a continuous learning loop for improving product quality.
What You'll Need:
- Over 20 years of experience in semiconductor design and verification.
- Strong expertise in ASIC, SoC, IP, or subsystem verification.
- Hands-on experience with high-speed protocols like UCIe, PCIe, CXL, DDR, HBM, Ethernet, and USB.
- Proficiency in scripting and automation using Python, Tcl, or equivalent.
- Experience with AI-driven verification tools is preferred.
Benefits:
- Comprehensive health, wellness, and financial benefits.
- Competitive salaries.
- ESPP (Employee Stock Purchase Plan).
- Retirement plans varying by region and country.
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