Analog Design, Principal Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You have spent over a decade designing analog circuits that have to move data at speeds most engineers never touch, and you know that the difference between a SERDES that works in simulation and one that works in silicon is a hundred small decisions about layout, process variation, and timing handoff. You are the kind of engineer who reads a SerDes standard and immediately starts sketching architectures that push beyond what the spec requires because you see where the bottleneck will be two years from now.

Responsibilities

• Review high-speed SerDes standards (PCIe, Ethernet, USB, CXL) and translate them into transceiver architectures and detailed sub-block specifications for Multi-Gbps NRZ and PAM4 designs
• Architect and design analog/mixed-signal circuits including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and ADC/DAC blocks for advanced FinFET and gate-all-around process nodes
• Collaborate with digital design teams on analog/digital co-design, calibration loops, adaptation algorithms, and timing handoff to ensure seamless integration and optimal performance
• Work directly with layout engineers to guide physical implementation, minimize parasitics, manage device stress and process variation, and ensure robust post-silicon performance
• Present simulation results, design trade-offs, and architectural decisions in internal reviews, customer meetings, and industry panel discussions
• Document design features, simulation methodologies, test plans, and characterization results, and support post-silicon bring-up and debug with electrical analysis and design iteration proposals
• Analyze customer silicon data and field performance to identify improvement opportunities and drive post-silicon design updates for next-generation IP releases

Requirements

• MTech/MS with 8+ years or BTech/BS with 10+ years of hands-on analog IC design experience in Electrical Engineering, Computer Engineering, or a related field
• Proven track record of CMOS tape-outs in FinFET technologies with demonstrable experience in Multi-Gbps high-speed designs using NRZ and PAM4 modulation
• Deep expertise in SERDES sub-circuit design including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and data converters
• Strong understanding of analog/digital co-design, calibration and adaptation algorithms, and timing handoff between analog and digital domains
• Proficiency with schematic entry, physical layout collaboration, design verification tools, and SPICE simulators (Spectre, HSPICE, or similar)
• Experience with scripting languages such as TCL, PERL, or MATLAB for post-processing simulation data and automating design tasks
• Solid grounding in system-level budgeting for jitter, amplitude, and noise, and familiarity with signal integrity challenges including packaging parasitics, crosstalk, and channel loss.

Benefits

• Comprehensive medical and healthcare plans that work for you and your family
• Time away programs, including ETO and FTO
• Family support, including maternity and paternity leave, parenting resources, adoption and surrogacy assistance
• ESPP: purchase Synopsys common stock at a 15% discount, with a 24-month look-back
• Retirement plans that vary by region and country
• Competitive salaries