Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
You are a visionary and detail-oriented analog designer, passionate about high-speed SerDes circuits and how they truly behave in silicon. With a deep foundation in transistor-level design, you translate specifications into robust, scalable circuits, balance power, area, and performance trade-offs, and anticipate the parasitics, mismatch, and process variation that separate simulation from reality.
Responsibilities
- Own the design and implementation of analog macros for SerDes IP across the TX, RX, CDR, and clock paths.
- Interpret SerDes standards and architecture documents to develop detailed macro specifications.
- Optimize circuits for power, area, and performance, and oversee layout to minimize parasitics, device stress, and process variation impacts.
- Propose and execute design verification strategies using advanced simulator features, including corner and Monte Carlo analysis.
- Collaborate with digital RTL engineers on calibration, adaptation, and control algorithms for your circuits.
- Define the sim-to-silicon correlation plan for your macros, specifying what to measure, under which conditions, and why.
- Build and refine models, including extracted parasitics, behavioral models, and channel/S-parameter models, until simulation explains silicon.
- Root-cause gaps between simulation and silicon back to circuit, layout, device modeling, or package and channel effects.
- Partner with the validation team to guide test plans and interpret measurement data, feeding fixes into the next design revision.
- Mentor a small group of analog designers, and present design and correlation results for peer and customer reviews.
The Impact You Will Have
- Deliver silicon-proven analog macros that elevate the performance and reliability of Synopsys’ industry-leading SerDes IP.
- Close the loop between simulation and silicon, improving model accuracy and first-pass silicon success.
- Prevent costly respins by catching modeling and design gaps before the next tapeout.
- Strengthen design methodologies so that lessons from silicon carry into future product generations.
- Accelerate time-to-market for next-generation PCIe and Ethernet IP.
- Give customers confidence through clear, data-backed explanations of silicon performance.
- Mentor and develop junior engineers, strengthening Synopsys’ talent pipeline.
Requirements
- MSc with 8+ years, or PhD with 6+ years of SerDes/high-speed analog design experience, including sim-to-silicon correlation of silicon-proven designs.
- Expertise in transistor-level circuit design, with silicon-proven TX, RX, and clock-path circuits in SerDes architectures.
- In-depth knowledge of SerDes sub-circuits such as equalizers, samplers, drivers, serializers, deserializers, VCOs, phase interpolators, DLLs, PLLs, bandgap references, ADCs, and DACs.
- Experience with analog behavioral modeling using Verilog-A.
- Strong understanding of device modeling and process variation, and their impact on circuit performance.
- Experience with link and channel analysis, including S-parameter and package models.
- Familiarity with high-speed link measurements and the ability to interpret lab data statistically.
- Proficiency with EDA tools and SPICE simulators, including parasitic extraction, corner, and Monte Carlo analysis.
- Programming experience in TCL, Perl, C, Python, and MATLAB for design automation, modeling, and data analysis.
Benefits
- Comprehensive medical and healthcare plans that work for you and your family.
- Time away: company holidays, ETO, and FTO Programs.
- Family support: maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- ESPP: purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
- Retirement plans: save for your future with our retirement plans that vary by region and country.
- Competitive salaries.
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