ASIC Verification Engineer

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world’s leading GPUs.

As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs, and be responsible for verification of the ASIC design, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent experience.

Responsibilities:

• Verify the design and implementation of the industry's leading GPUs.
• Be responsible for verification of the ASIC design, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent experience.
• Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure, and verify the correctness of the design.
• Collaborate with architects, designers, and pre-/post-silicon verification teams to accomplish your tasks.

Requirements:

• Bachelor’s Degree in EE, CS, or CE; or equivalent experience.
• 5+ years of relevant experience.
• Background in verification using random stimulus, along with functional coverage and assertion-based verification methodologies.
• Experience with design and verification tools (VCS or equivalent simulation tools; debug tools like Debussy, GDB).
• Experience in crafting test bench environments for unit- and system-level verification.
• Expertise in SystemVerilog or similar HVL.
• C++ programming language experience, including a strong understanding of object-oriented programming principles, data structures, and algorithms.
• Good working knowledge of the fundamentals of computer architecture and digital build.
• Excellent debugging and analytical skills.
• Prior experience with processor pipeline verification is desirable.

Benefits:

• You will also be eligible for equity and benefits.

Salary:

• The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.