Senior ASIC Verification Engineer

We are seeking an elite ASIC Verification Engineer to verify the design and implementation of the world's leading GPUs.

As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs.

Responsibilities:

• Verify the design and implementation of the ASIC design, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent experience.

• Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure, and verify the correctness of the design.

• Collaborate with architects, designers, and pre-/post-silicon verification teams to accomplish your tasks.

Requirements:

• Bachelor's Degree in EE, CS, or CE; or equivalent experience.

• 5+ years of relevant experience.

• Experience in verification using random stimulus, along with functional coverage and assertion-based verification methodologies.

• Background with design and verification tools (VCS or equivalent simulation tools; debug tools like Debussy, GDB).

• Experience in crafting test bench environments for unit- and system-level verification.

• Expertise in SystemVerilog or similar HVL.

• C++ programming language experience, including a strong understanding of object-oriented programming principles, data structures, and algorithms.

• Good working knowledge of the fundamentals of computer architecture and digital build.

• Excellent debugging and analytical skills.

• Prior experience with processor pipeline verification is desirable.

You will also be eligible for equity and benefits.