Description
ASIC Design Verification Engineer specializing in Simulation is required at Cisco. The engineer will develop and execute verification strategies to ensure correctness and performance of complex hardware designs. Key responsibilities include:
- Developing and implementing verification plans and test benches using Simulation tools and methodologies.
- Collaborating with design and validation teams to identify verification requirements and coverage goals.
- Utilizing emulation platforms to run large-scale verification tests and debug design issues.
- Analysing verification results, identifying bugs, and working with design engineers to resolve issues.
- Maintaining and enhancing verification infrastructure and automation frameworks.
- Documenting verification processes, test cases, and results.
- Staying current with emerging verification technologies and best practices.
- Mentoring junior engineers and contributing to team knowledge sharing.
The ideal candidate will have:
- Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience
- Strong experience in Design verification methodologies using UVM or OVM
- Relevant experience in design verification with a strong emphasis on Test Methodologies
- Experience in Networking (Ethernet, AXI, AMBA, PCIe etc)