PCIe Design Verification Intern

NVIDIA is seeking a PCIe Design Verification Intern for a six-month role from May 2027 to December 2027.

In this role, you will work in an SV/UVM test-bench, verifying PCIe and CXL hardware functionality and performance. Responsibilities may include enablement of new features, coding of coverage or checkers, simulation performance measuring/analysis/improvement, or automation of engineering processes and tools.

Responsibilities:

• Develop directed or random diagnostics to validate the processor Instruction Set Architecture (ISA), reference models, C simulation models, RTL models, HW emulators, and real hardware.
• Write and review validation test plans.
• Debug diagnostics on various platforms.
• Collaborate with a worldwide team of engineers on planning, development, and deployment.

Requirements:

• Pursuing a BS or MS in Computer Science, Computer Engineering, Electrical Engineering, or a related degree.
• Exposure to computer architecture, ASIC design, or verification methodology is required.
• Familiarity with Object-Oriented programming and/or SystemVerilog.
• Previous scripting experience in Python or Perl.

Preferred Qualifications:

• Passionate about solving problems.
• Experienced with directed and random functional testing, including writing test plans.
• Familiar with automation of build, test, and other engineering processes.
• Experience with hardware simulation and waveform debug tools.

NVIDIA offers a competitive hourly rate of $20-$71 per hour, depending on position, location, year in school, degree, and experience. You will also be eligible for intern benefits.