Description
Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development.
Your role involves reviewing micro-architecture specifications, implementing a verification environment using UVM, collaborating with design engineers to resolve bugs and achieve coverage closure, working with firmware and lab teams to verify chip flows, and performing debug, root-cause analysis, and post-silicon validation in the lab.
The ideal candidate will have:
- A B.Sc./M.Sc. in Electrical Engineering from a top university
- 4+ years of experience in the field
- Knowledge of UVM and functional verification methodologies
Preferred qualifications include:
- Experience with MATLAB simulations and bit-exact modeling environments
- Familiarity with mixed-signal systems and environments
- Knowledge and hands-on experience with Clock Domain Crossing (CDC)
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organisations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds.