Description
OpenAI's Hardware organization develops AI-native silicon and system-level solutions for advanced AI workloads. We're looking for an ML Silicon Performance Lead to drive hardware/software co-design for our silicon architecture.
You will work across models, kernels, compilers, and silicon to shape how ML workloads map to hardware,and how the hardware should evolve to support them. Your work will connect model and workload requirements with compute, memory, and specialized acceleration capabilities to maximize performance, efficiency, and scalability across current and future generations of AI silicon.
Responsibilities:
- Drive hardware/software co-design across ML research, compiler, and silicon teams, jointly shaping kernel implementations and hardware capabilities to meet workload performance and efficiency goals.
- Partner with ML research to translate model and workload needs into kernel performance targets and compute, memory capacity, and bandwidth requirements.
- Map and optimize ML kernels for architecture, using insights from data movement, memory hierarchy, and execution efficiency to guide both software improvements and hardware design.
- Co-design support for new data structures and quantization formats across kernels, compilers, and silicon.
- Define and help develop specialized acceleration IP, working with compiler and silicon partners.
- Drive ML performance modeling and simulation with the compiler team.
Requirements:
- Deep experience with ML accelerator architecture.
- Ability to translate model-level behavior into concrete kernel requirements and hardware design decisions.
- Experience with hardware/software co-design.
- Hands-on experience optimizing ML kernels.
- Understanding of quantization and numerical formats.
Salary: $287K - $485K