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From the employer's careers site First seen 31 Oct 2026

Design Verification Engineer for DFT

Cisco Tel Aviv-Yafo Hybrid senior full-time

The employer hasn't listed a salary.

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Description

We are a leading Design for Test (DFT) group at Cisco, delivering end-to-end solutions for flagship products, including Cisco Silicon One.

Our team operates in a hybrid model, with three days a week in the office in Midtown Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation.

As a Design Verification engineer, you will lead and drive DFT verification activities within the Cisco SiliconOne DFT team.

Key responsibilities:

  • Develop verification plans, environments, checkers, assertions, and coverage models for DFT features.
  • Verify DFT architecture and implementation in close collaboration with DFT, design, architecture, and verification teams.
  • Work on verification of scan, MBIST, IJTAG/JTAG, test access mechanisms, DFT controllers, and related SoC-level test features.
  • Debug complex pre-silicon issues across RTL, verification environments, and DFT logic.
  • Contribute to scalable methodologies, reusable verification components, and best practices for DFT DV.

Minimum qualifications:

  • B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related field.
  • 5+ years of experience in design verification roles.
  • Strong experience with SystemVerilog and UVM-based verification environments.
  • Experience developing verification plans, coverage models, assertions, and debug flows.
  • Strong communication skills and ability to work closely with cross-functional teams.
  • Motivation to learn DFT concepts and become a key contributor in the DFT DV domain.

Preferred qualifications:

  • Familiarity with DFT concepts such as scan insertion, memory BIST, ATPG, boundary scan, and silicon test flows.
  • Experience with complex SoC verification, networking silicon, or high-performance AI-driven silicon.
  • System-level understanding of large-scale chip architecture and integration.
  • Ability to build new methodologies and establish verification activity from the ground up.
  • High attention to detail, ownership mindset, and willingness to grow into new technical domains.

Skills

Required

Nice to have

  • scan insertion
  • memory BIST
  • ATPG
  • boundary scan
  • silicon test flows

Ready to apply?

You apply with the employer directly. Their original posting is here: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Tel-Aviv-Yafo-Israel/DV-DFT-Engineer_2014936

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