Senior Front-End Power Engineer

We are seeking a Power Optimization and Analysis Engineer to join our u/arch team in the Switch group at NVIDIA. As a Senior Front-End Power Engineer, you will analyze full chip and unit-level power data, drive FE/BE ASIC teams to improve power efficiency, and develop methodologies to make NVIDIA's products more energy efficient.

Key responsibilities include:

• Analyzing power data and driving ASIC teams to improve power efficiency
• Researching, developing, and deploying power analysis and reduction techniques
• Collaborating with architects, performance engineers, software engineers, and physical design teams
• Developing techniques to model, analyze, and reduce power consumption of NVIDIA Switches product line

Requirements:

• BSC or MS in Computer Engineering or Electrical Engineering
• 5+ years of experience in chip design
• Good interpersonal skills and ability to collaborate with design teams
• Familiarity with Verilog and ASIC design or verification
• Strong coding/automation skills in Python, Perl, and C++

Nice to have:

• Experience with Power Artist, PTPX (Prime Power RTL, RTL Architect)
• Strong understanding of energy consumption, estimation, data movement, and low power design