Description
NVIDIA is seeking a Senior Validation Architect for NVLink to define advanced chip interconnects and protocols. You will be part of a team responsible for defining next-generation communications standards and products building on our current NVLink technology.
Responsibilities:
- Work with other architects to define architectural modeling and testing requirements for new NVLink features
- Drive architectural testing requirements into lower-level testbenches
- Implement functional models and integrate them into full-chip and multi-chip environments for both architectural validation and firmware/software development
- Support and debug tests in model, emulation, and post-silicon environments
Requirements:
- MS or PhD in Electrical Engineering, Computer Science, or Computer Engineering (or equivalent experience)
- At least 8+ years of relevant experience in architecture, design, and verification
- Firsthand work experience with innovative ASIC design processes
- C++ and scripting language (Python, Makefile) experience; SystemC modeling a plus
- Strong debugging skills in FW/SW environments and IP model integration
- Test plan development and execution experience
- You've completed and shipped multiple projects and are skilled at processor and/or I/O Architecture
- A self-starter excited to work as part of a small dynamic team
Salary: The expected base salary ranges for this position are: 184,000 USD – 287,500 USD for Level 4; and 224,000 USD – 356,500 USD for Level 5.
Benefits: You will also be eligible for equity and benefits.