Description
We are looking for a Senior Mixed-Signal/Analog/IO Circuit Design Engineer to join our growing team. As a key member of our design team, you will be responsible for designing high-speed memory interface circuits using mixed-signal/analog circuit techniques. You will work closely with cross-functional teams to optimize designs and ensure they meet performance, power, and area (PPA) targets.
Your responsibilities will include:
- Designing high-speed memory interface circuits using mixed-signal/analog circuit techniques
- Solving challenges related to circuit development in deep submicron CMOS FinFET processes
- Taking designs through productization and being involved in all stages of development
- Working with multi-functional teams to optimize designs
To be successful in this role, you will need:
- A Bachelor's degree in Electrical Engineering or a related field, or equivalent experience
- At least 8 years of experience in high-speed memory (LPDDR, DDR, GDDR, HBM) or SerDes related design
- System-level timing budgets, specs, and analysis
- In-depth understanding of deep submicron CMOS FinFET process and circuit design issues
- Familiarity with device reliability, ESD, and latch-up requirements
- Lead layout development and understand all ESD/latch-up, reliability rules
- Broad circuit design and implementation knowledge with significant depth
- Working knowledge of Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre
- Solid understanding of Verilog, Nanotime, Matlab
- Hands-on experience with lab test and measurement equipment
If you are a creative and autonomous professional with a genuine passion for technology, we want to hear from you! You will also be eligible for equity and benefits.