Applications Engineering, Sr Engineer

You will work as a Senior Engineer in the Applications Engineering team at Synopsys, providing technical support to global customers using Synopsys Zebu Emulation and Protocompiler Prototyping software.

Responsibilities:

• Provide technical support to global customers, troubleshooting issues across partitioning, synthesis, place and route, and hardware debug
• Work directly with customers to migrate their designs to new software releases, ensuring compatibility and resolving any regressions or performance issues
• Deploy new software features on live customer designs, helping them adopt capabilities like advanced partitioning algorithms, new debug modes, or updated FPGA target support
• Deliver technical training sessions to customers, ranging from basic tool usage to advanced workflows for multi-FPGA partitioning and hardware-software co-verification
• Collaborate with Synopsys HAV R&D teams to report customer issues, provide reproducible test cases, and advocate for product improvements
• Support pre-sales evaluations by running customer designs through the Synopsys emulation and prototyping flow
• Travel occasionally to customer sites for onsite support, training, or critical issue resolution

Impact:

• Enable customers to bring up complex SoC designs on emulation and prototyping platforms faster
• Improve product quality by surfacing real customer pain points to R&D
• Build customer confidence in Synopsys HAV solutions through responsive, expert-level support
• Expand adoption of new software features by showing customers how to use them on their actual designs
• Reduce escalations and support load over time by delivering training that helps customers become more self-sufficient

Requirements:

• Bachelor's in Electronics Engineering with 2-3 years of experience, or Master's in Electronics Engineering with 1-2 years
• Hands-on experience with logic design and implementation using FPGAs
• Strong working knowledge of Verilog, System Verilog, or VHDL
• Practical experience with FPGA architecture and back-end implementation flows
• Exposure to Xilinx or Altera synthesis tools is a plus
• Experience with interface protocols like PCIe, AXI, UART, or I2C is a plus
• Scripting experience in Python, Tcl, or shell is desirable