Sr Staff ASIC Verification Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You have spent years verifying complex IP and you know the difference between a verification plan that looks complete on paper and one that actually catches the corner case that would have escaped to silicon. Ownership is not a buzzword for you, it is how you work. When you take on an IP or subsystem, you see the entire arc from architecture through signoff, and you know which risks matter in week two versus week twenty.

You will:

• Own verification for a major IP block, subsystem, or cross-IP methodology from architecture definition through final signoff and customer delivery
• Define verification strategy, planning, architecture, and signoff criteria for complex IP projects including Ethernet, USB, and similar industry-standard protocols
• Lead technical execution across verification teams by setting objectives, tracking milestones, managing risk, and driving coverage and quality closure
• Apply AI-assisted verification techniques to intelligent debug, regression analytics, test generation, and coverage closure to measurably reduce cycle time and improve defect detection
• Build and drive reusable verification infrastructure, UVM environments, and methodology improvements that scale across multiple IP domains and projects
• Mentor verification engineers on test planning, debug strategies, coverage analysis, and verification best practices while fostering technical growth across the team
• Collaborate with design, architecture, firmware, and quality teams to align verification deliverables with project goals and ensure high-quality IP releases

The Impact You Will Have:

• Deliver thoroughly verified, customer-ready DesignWare IP that reduces integration risk and increases confidence for silicon teams building next-generation products
• Drive measurable improvements in verification efficiency including faster coverage closure, shorter regression cycles, reduced debug time, and fewer escaped defects
• Advance verification methodologies and reusable infrastructure that improve execution quality and delivery predictability across IP projects
• Strengthen the technical capability of the verification organization by mentoring engineers and establishing best practices that scale
• Reduce project risk by identifying verification gaps early, optimizing processes, and ensuring robust signoff criteria are met before release
• Enable Synopsys to maintain leadership in IP quality and reliability during the era of pervasive intelligence and AI-powered silicon design
• Contribute to the success of customers who depend on Synopsys IP to power critical functions in their chips, from data centers to automotive to mobile devices

Requirements:

• BS or BE in Electrical or Electronics Engineering with 8+ years of IP or SoC verification experience, or MS with 6+ years
• Demonstrated ownership of verification for complex IP blocks, subsystems, or cross-project methodologies with a track record of delivering measurable quality and coverage results
• Proven ability to lead verification teams and projects through technical influence, expertise, and collaboration rather than formal management authority
• Deep hands-on expertise in UVM, VMM, or OVM methodologies applied to real verification environments at unit and system levels
• Strong proficiency in SystemVerilog, industry-standard simulators like VCS, and associated debug tools used in complex IP verification workflows
• Practical experience applying AI-assisted methods to debug, regression optimization, test generation, or verification closure activities
• Experience with DesignWare IP or similar synthesizable IP verification, and familiarity with protocols such as Ethernet, USB, or PCI Express is a strong plus

Benefits:

• Comprehensive medical and healthcare plans that work for you and your family
• Time away: company holidays, ETO and FTO Programs
• Family support: maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
• ESPP: purchase Synopsys common stock at a 15% discount, with a 24-month look-back
• Retirement plans: save for your future with our retirement plans that vary by region and country
• Competitive salaries