Description
You will define, design, and verify ASIC and ASIC subsystems for deployment in various Cisco platforms. You will contribute to a multi-disciplinary engineering team to meet power, performance, and area goals for products. Your responsibilities will include designing, documenting, and developing ASIC subsystems for high-volume and quality releases. You will also help define processes, methods, and tools for designing and implementing complex developments.
Key responsibilities:
- Drive the definition, architecture, and design of high-performance ASICs
- Own complex or multiple functional areas
- Develop reusable code for future projects
- Create reusable code
- Debug at ASIC, software, and hardware levels
- Work with ASIC and applications, with limited external scope
- Lead design work by solving block-level issues and participating in chip-level issue resolution
- Drive reviews and recognize areas of architectural concern
- Define new verification methodologies
- Assist in lab bring-up
- Lead code reviews at the platform level
- Define methodologies of execution for analog/mixed-signal products
- Collaborate with the mixed-signal team and system teams to define and specify requirements
- Test high-accuracy analog designs and support the development and deployment of PD EDA flows
- Own physical design of highly complex blocks
- Identify, design, and implement power and signaling solutions
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field, or equivalent practical experience
- 5 years of experience with hardware testing of systems based on custom ASICs or SoC products
- Experience with Linux/Unix, Python programming, and TCP/IP network configuration
Benefits and perks are not specified in the job posting.