Description
We are seeking a dedicated and hard-working Senior Mixed Signal Design Validation Engineer to join our high-speed mixed signal circuits team. As part of this team, you will lead the bring-up and characterization of complex interfaces and modules. Your primary responsibility will be to validate high-speed I/O systems, focusing on the performance of advanced memory interfaces like LPDDR, GDDR, and HBM, to ensure the highest standards of quality and reliability.
Your key responsibilities will include:
- Leading and driving the creation of validation test plans and test scripts for DDR I/O associated with LPDDR, GDDR, and HBM memory interfaces, ensuring all necessary required analog and digital circuits are covered.
- Conducting thorough characterization of analog, digital, and mixed-signal circuit blocks under varying conditions (process, voltage, temperature) and correlating results with simulations.
- Driving system-level validation for memory interfaces, ensuring high-speed performance and quality metrics meet the demanding standards required by our GPU and AI systems.
- Investigating memory I/O circuit weaknesses to pave the way for circuit improvements and architecture enhancements in future products.
- Leading debugging efforts and designing creative solutions to resolve unexpected bugs.
- Validating silicon performance, quality, and margins for refinement of memory interface designs.
- Developing and implementing test scripts to optimize DDR I/O circuit, sub-circuits, and overall system performance.
- Collaborating closely with multi-functional teams, including mixed-signal design, PISI team, hardware, firmware, and memory qualification engineers, to resolve issues and improve memory interface performance.
- Developing and implementing tools and scripts to enhance electrical characterization and chip bring-up processes.
- Mentoring and training new engineers on validation practices, encouraging a culture of excellence and continuous improvement.