Description
We are seeking an experienced DFT Engineer to join our Design-for-Test Engineering team at NVIDIA. As a DFT Engineer, you will work on developing next-generation DFT technologies and collaborating with various teams, including chip design, backend, verification, and production testing.
Responsibilities:
- Develop and implement state-of-the-art Design for Test/ATPG flows
- Take full ownership of ATPG projects from architecture and planning to pattern generation, verification, and post-silicon bring-up and diagnosis
- Invent and maintain automation flows that provide short test times to production
Requirements:
- 5+ years of hands-on DFT/ATPG experience
- Experience with Mentor TestKompress ATPG tool and retargeting flow
- Strong programming skills in scripting languages
- BSc in Electrical Engineering or Computer Engineering
- Quick learner, proactive, and self-motivated
Nice to Have:
- Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation
- Programming languages: TCL, PRL, Python, and Unix shell scripts
- Experience with ATE and silicon bring-up