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Synopsys

SRAM Design, Sr Engineer

Synopsys
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onsite senior full-time Hsinchu, Taiwan

First indexed 22 Aug 2026

Description

You are an experienced engineer passionate about advancing memory design technologies.

At Synopsys, we drive the innovations that shape the way we live and connect.

As a Senior Engineer in SRAM Design, you will be designing and verifying SRAM integrated circuits to ensure robustness and reliability.

Your responsibilities will include:

  • Designing and verifying SRAM integrated circuits to ensure robustness and reliability.
  • Developing SRAM compilers, including gds and netlist tiling for optimal performance and scalability.
  • Characterizing SRAM timing, power, and other critical metrics to meet customer and product requirements.
  • Executing compiler quality assurance processes to uphold industry-leading standards.
  • Conducting SRAM bitcell analysis and formulating design criteria for advanced memory products.
  • Utilizing EDA tools (XA, hspice, Verilog, Starrc, EMIR) for simulation, verification, and design optimization.
  • Collaborating with cross-functional teams to address post-silicon debug and implement improvements.
  • Exploring and integrating SP/2P/ROM variety designs into SRAM IP solutions.

The impact you will have includes driving innovation in SRAM IP design, enhancing product performance and reliability for global semiconductor customers, and supporting the delivery of best-in-class SRAM compilers used in high-performance silicon chips.

To qualify, you need:

  • Master’s degree in Electrical/Electronic Engineering or a related field.
  • 0-3+ years of hands-on experience in SRAM circuit design.
  • Prior understanding of CMOS-based block level circuit design and SRAM architectures.
  • Experience with SP/2P/ROM variety design and SRAM bitcell analysis.
  • Proficiency in digital circuit design and VLSI process concepts.
  • Familiarity with scripting languages such as Python, Tcl/Tk, Perl, and Unix shell.
  • Experience with EDA tools for simulation and design: XA, hspice, Verilog, Starrc, EMIR.

Post-silicon debug experience is a plus.

Benefits include comprehensive medical and healthcare plans, time away programs, family support, ESPP, retirement plans, and competitive salaries.

This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/hsinchu/sram-design-sr-engineer/44408/99518548608