Description
We are seeking a Principal Signal Integrity Engineer to work with our experienced signal integrity team on high-speed ASIC PAM4 SerDes and system-level signal and power integrity analysis for cutting-edge networking product design.
Job Description: As a Principal Signal Integrity Engineer, you will perform COM (channel margin analysis) to provide design trade-offs amongst ASIC package, board, and connectors. You will develop ASIC PAM4 SerDes channel simulation models and correlate them to test structures. Additionally, you will correlate ASIC PAM4 SerDes simulation results with measurements and work with component and ASIC vendors to improve model accuracy.
Key Responsibilities:
- Perform PCB timing analysis and work with board engineers and layout designers to implement all design SI rules
- Develop and document all layout/SI design rules and checklists
- Perform ASIC PAM4 SerDes parametric tuning to improve design margins of serial links
- Perform SI DVT measurements on boards and correlate simulations with DVT measurements
- Provide technical assessment of projects to the SI management team
Basic Requirements:
- Typically, 10+ years of Signal Integrity analysis experience with a Bachelor's degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering
- Typically, 8+ years of Signal Integrity analysis experience with a Master's degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering
- Experience with 56G/112G ASIC PAM4 SerDes technologies is required
- 200G ASIC PAM4 experience desired
- Hands-on experience in serial channels up to 200G line rates for coefficient tuning, TP1A measurements
Preferred Skills:
- Proficient with CAD tools such as Ansys HFSS, SIwave ADS, Allegro, Sigrity, and MATLAB
- Proficient with lab equipment such as oscilloscopes, Vector Network Analyzers, Time Domain Reflectometers, Spectrum Analyzers, phase noise Analyzers
- Strong capabilities to debug and provide solutions for ASIC PAM4 SerDes and channel performance issues
- Design implementation for system clocks and solid understanding of PLL design and debug
- PCB Stack-up design using 2-d field solvers
What We Can Offer You: We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial, and emotional wellbeing. We also invest in your career because the better you are, the better we all are.