Senior Staff Low Power Verification Applications Engineer

You are a seasoned low-power verification expert with a deep understanding of UPF and its applications. You will lead technical deployments of VCS NLP at strategic customer sites, working directly with verification teams to implement power-aware simulation flows for complex SoCs and IP blocks.

Your responsibilities include:

• Debugging and resolving challenging low-power verification issues involving UPF modeling, power state transitions, retention logic, isolation strategies, and corruption scenarios across multi-domain designs
• Acting as the technical bridge between customers and Synopsys R&D, translating real-world verification challenges into product requirements and influencing the VCS NLP roadmap
• Developing and delivering best-practice methodologies, reference flows, application notes, and training materials for IEEE 1801 based verification
• Providing technical mentorship to customer teams and internal engineers on advanced low-power verification techniques and UVM integration with power-aware simulation

As a Senior Staff Low Power Verification Applications Engineer, you will have a significant impact on:

• Enabling semiconductor companies to achieve robust pre-silicon verification of advanced power management architectures, reducing the risk of costly power-related silicon bugs
• Accelerating customer adoption and time-to-productivity with VCS NLP, directly impacting their ability to meet aggressive tapeout schedules
• Shaping the evolution of Synopsys low-power verification solutions by providing R&D with prioritized, real-world customer requirements
• Building verification methodologies that become industry reference standards, influencing how teams across multiple companies approach power-aware verification

To succeed in this role, you will need:

• A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical discipline
• 8 to 12 years of hands-on experience in product engineering, applications engineering, or ASIC/SoC verification with a focus on low-power methodologies
• Deep expertise in IEEE 1801 (UPF) including power domains, power state tables, retention strategies, isolation, level shifters, and power sequencing
• Strong proficiency with SystemVerilog, UVM, assertions (SVA), coverage-driven verification, and RTL simulation flows

You will be part of a team that values technical excellence and collaboration. Your recruiter will share more about the team structure and mission during the interview process.

The company offers a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process.